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Verilog Code:

module blink (clk, LED, statusPIN);

input clk;
output statusPIN;
output LED;

reg [31:0] counter;
reg LED_status;

initial begin
counter <= 32'b0;
LED_status <= 1'b0;
end

always @ (*) 
begin
counter <= counter + 1'b1;
if (counter > 50000000)
begin
LED_status <= !LED_status;
counter <= 32'b0;
end


end

assign LED = LED_status;
assign statusPIN = LED_status;

endmodule 

UCF File:

NET "LED" LOC = F12;
NET "LED" IOSTANDARD = LVCMOS33;
NET "statusPIN" LOC = E8;
NET "statusPIN" IOSTANDARD = LVTTL;

LED is blinking too fast but when I read the status of the pin, it is still low. Where is the problem in code.

Thank you for your time.